Upcoming Events
The EE HPC WG regularly holds Workshops, Showcases, Birds of Feather, Panels and Webinars. This shows 2025 event plans and status. For prior year events, go to Presentations.
Conferences
The EE HPC WG will participate with Workshops and Birds of Feather at the ISC High Performance 2025 Conference in Hamburg, Germany, June 10 – 13.
The EE HPC WG will participate with a Booth, Birds of Feather and possibly workshops and panels at SC'25 in St. Louis, Missouri, November 16 - 21.
Workshops
The EE HPC WG is collaborating to host several workshops at the ISC High Performance 2025 Conference.
Energy Efficiency with Sustainable Performance: Techniques, Tools, and Best Practices Workshop
Sustainable Supercomputing
The EE HPC WG will hold the 16th Annual EE HPC WG Workshop in 2025 as a virtual event (Date TBD). This event hosted invited speakers with a focus on HPC site experiences.
Showcase
To be announced soon, for early 2025.
Webinars
Dr. John Gustafson, will present a webinar on “Every Bit Counts: Posit Computing.” February 19th at 8AM Pacific Time.
Register in advance for this meeting:
https://lbnl.zoom.us/meeting/register/LO9n9QdMRDSWDkslUWz_5A
After registering, you will receive a confirmation email containing information about joining the meeting.
Abstract: Both the HPC and AI communities are increasingly using the posit approach that Gustafson introduced in 2017, which may be the future of technical computing. This is a new way for computers to calculate that saves time, storage, energy, and power by packing more information into every bit than do legacy approaches. Current technical computing is based on acceptance of rounding errors using numerical representations that were invented in 1914, and of sampling errors using an ad hoc number format from almost 50 years ago, designed for when transistors were very expensive but electrical power was relatively free. By sticking to an antiquated storage format well into exascale, we are wasting power, energy, storage, bandwidth and programmer effort. We introduce posit format for real numbers that closely match the distribution needed for computing, with more accurate answers within the needed dynamic range. This is a fresh and mathematical design to engineering goals that allows better answers using fewer bits.
Dr. John Gustafson is an applied physicist and mathematician best known as a disruptive thought leader in HPC. He demonstrated scalable massively parallel performance on real applications in 1988, for which he won the inaugural Gordon Bell Award. ‘Gustafson’s Law’ is widely taught in computer science courses. John is currently a Visiting Scholar, Arizona State University and Chief Scientist, Vq Research. He holds applied mathematics degrees from the California Institute of Technology (Caltech) and Iowa State University.
2026 Plans:
TBD